【25屆暑期實(shí)習(xí)】芯片物理設(shè)計(jì)工程師
面議
應(yīng)屆畢業(yè)生
學(xué)歷不限



- 全勤獎(jiǎng)
- 節(jié)日福利
- 不加班
- 周末雙休
職位描述
該職位還未進(jìn)行加V認(rèn)證,請(qǐng)仔細(xì)了解后再進(jìn)行投遞!
職責(zé)描述:
1.Physical implementation of advanced technology chips.
2.Design methodology development and innovation for advanced technology challenges.
3.Be responsible for 22/16/12/10/7/5nm chip implementation for customer’s projects or internal system test chips.
4.Be responsible for advanced node PPA benchmark, and solution development.
5.EDA tool new features enablement.
6.Customer onsite/offsite supports will be required on demand.
任職要求:
1.MS or above in EE, CS related fields. Experience in APR, physical verification, chip implementation, or CAD development is plus.
2.New graduate or 3 years working experience in chip physical implementation.
3.Familiar with Synopsys/Cadence APR tools/flows.
4.Familiar with TCL/Perl/Python programming.
5.Experience with TSMC advanced technology is plus.
6.Proven record in production tape-outs is plus.
招聘人數(shù):1人
工作地點(diǎn)
地址:南京江寧區(qū)南京-江寧區(qū)九龍湖


職位發(fā)布者
HR
臺(tái)積電(南京)有限公司

-
電子技術(shù)·半導(dǎo)體·集成電路
-
200-499人
-
外商獨(dú)資·外企辦事處
-
浦口經(jīng)濟(jì)開發(fā)區(qū)紫峰路16號(hào)
相似職位